T16 Rename Generation: ft.Koyarno's CLA/CLE (Fix)
Description
The unit cyclically generates names by tracking a "head" and "tail" pointer. A comparator ensures the "head" can never overtake the "tail".
5-bit Physical Names
Related Schematics
2x2x7 per bit, 8 bits binary RAM (combinational)
Small binary cobinational RAM that does not use observers/pistons/1.21 items or anything of sort. MCHPRS compatible. Size: 2x2x7 blocks per bit (stackeable + can be flipped to merge outputs of different modules)In theory possible to get to 6 blocks long due to large amount of air space where the toches are but... probably not too doable tbh Write/Read are on the same glass tower, but still work separately and don't affect one another. Reading and writing to the same byte at the same time is not possible, only one at a time.
T16 Dependency Matrix
Checks for RAW dependencies between source and destination operands. Each entry holds allows for up to two source operands and one destination operands, with disables available for fine operand control.5-bit Operands5 entries3op, 2op, 1op compatible(Not a standalone unit, part of issue logic)
Droid transport
Marwan • ID: dgy1xS
Attack venicle
Marwan • ID: dxA8X-
Tank 4
Marwan • ID: RcgiD5
Support Spacecraft
Marwan • ID: _q0JOH
Robot
Marwan • ID: hT3IQh