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T16 Rename: Translation
Translates up to two architectural source registers into, committed, physical names.5-bit Physical Names4-bit Architectural Registers
T16 Rename: Free-Names
Tracks names which have written back. Once a physical register has written back, and the tail points to the given name, the name will be committed to CPU state.5-bit Physical Names4-bit Architectural Registers
16-bit Double Density(DD) CCA
DD Diagonal CCA. Inputs, located on the underside, are paired and alternate left to right (A0 B0 on the left... A1 B1 on the right... and so on) 4-ticks16-bit
16-bit Double Density(DD) CCA ALU, Latched
Diagonal DD CCA with intergrated latch to make the ALU effectively 3t *in a pipeline*.3t + 1t latch16-bitALUified
T16 Rename Generation: ft.Koyarno's CLA/CLE (Fix)
The unit cyclically generates names by tracking a "head" and "tail" pointer. A comparator ensures the "head" can never overtake the "tail".5-bit Physical Names
T16 Dependency Matrix
Checks for RAW dependencies between source and destination operands. Each entry holds allows for up to two source operands and one destination operands, with disables available for fine operand control.5-bit Operands5 entries3op, 2op, 1op compatible(Not a standalone unit, part of issue logic)
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