Username & Password

Traditional login

Username
Password
Or

Microsoft Account

Recommended

Sign in instantly using your Microsoft account.

Logo

Create Account

Microsoft Account

Recommended

Or

Auth Server

Alternative method

Connect to our authentication server:
Once connected, run this command with your desired password:
Replace <your_password> with your actual password

Tuchi_

Tuchi_

Joined 1 day ago

About Tuchi_

The Church of Solid State welcomes you.

Tuchi_'s Schematics

Tuchi_
Tuchi_
16-bit Double Density(DD) CCA

16-bit Double Density(DD) CCA

DD Diagonal CCA. Inputs, located on the underside, are paired and alternate left to right (A0 B0 on the left... A1 B1 on the right... and so on) 4-ticks16-bit

Jul 07, 2025
View 16-bit Double Density(DD) CCA
Tuchi_
Tuchi_
16-bit Double Density(DD) CCA ALU, Latched

16-bit Double Density(DD) CCA ALU, Latched

Diagonal DD CCA with intergrated latch to make the ALU effectively 3t *in a pipeline*.3t + 1t latch16-bitALUified

Jul 07, 2025
View 16-bit Double Density(DD) CCA ALU, Latched
Tuchi_
Tuchi_
T16 Rename: Translation

T16 Rename: Translation

Translates up to two architectural source registers into, committed, physical names.5-bit Physical Names4-bit Architectural Registers

Jul 07, 2025
View T16 Rename: Translation
Tuchi_
Tuchi_
T16 Rename: Free-Names

T16 Rename: Free-Names

Tracks names which have written back. Once a physical register has written back, and the tail points to the given name, the name will be committed to CPU state.5-bit Physical Names4-bit Architectural Registers

Jul 07, 2025
View T16 Rename: Free-Names
Tuchi_
Tuchi_
T16 Rename Generation: ft.Koyarno's CLA/CLE (Fix)

T16 Rename Generation: ft.Koyarno's CLA/CLE (Fix)

The unit cyclically generates names by tracking a "head" and "tail" pointer. A comparator ensures the "head" can never overtake the "tail".5-bit Physical Names

Jul 07, 2025
View T16 Rename Generation: ft.Koyarno's CLA/CLE (Fix)
Tuchi_
Tuchi_
T16 Dependency Matrix

T16 Dependency Matrix

Checks for RAW dependencies between source and destination operands. Each entry holds allows for up to two source operands and one destination operands, with disables available for fine operand control.5-bit Operands5 entries3op, 2op, 1op compatible(Not a standalone unit, part of issue logic)

Jul 07, 2025
View T16 Dependency Matrix
Tuchi_
Tuchi_
T16 Batch Issue Logic

T16 Batch Issue Logic

Secret Sauce

Jul 08, 2025
View T16 Batch Issue Logic